STAGING PILOT

Brand Owner (click to sort) Address Description
STAGINGPILOT PANTHEON SYSTEMS, INC. 717 California Street San Francisco CA 94108 STAGING PILOT;Computer programming; Computer security consultancy; Computer software consultancy; Computer software design; Computer software development; Computer virus protection services; Creating and maintaining web sites for others; Information technology consulting services; Installation of computer software; Recovery of computer data; Rental of computer software; Rental of web servers; Server hosting; Software as a service (SAAS) services featuring software for automated updates and testing; Updating of computer software; Web site hosting services;
STAGINGPILOT Tyler Digital 530 S Lake Ave #333 Pasadena CA 91101 STAGING PILOT;Computer programming; Computer security consultancy; Computer software consultancy; Computer software design; Computer software development; Computer virus protection services; Creating and maintaining web sites for others; Information technology consulting services; Installation of computer software; Recovery of computer data; Rental of computer software; Rental of web servers; Server hosting; Software as a service (SAAS) services featuring software for automated updates and testing; Updating of computer software; Web site hosting services;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. Reference generator systems (108, 130) and methods (200) are presented for providing bitline reference voltages for memory access operations in a ferroelectric memory device (102). The reference generator system (108, 130) comprises a primary capacitance (130), a precharge system (132) that charges the primary capacitance, and a reference system (108) with a plurality of local reference circuits (108a) associated with corresponding array columns that individually comprise a staging capacitance (Cs), a first switching device (S1) coupled between the staging capacitance and the primary capacitance (130), and a second switching device (S2, S3) coupled between the staging capacitance (Cs) and a bitline of the corresponding array column. The first switching device (S1) couples the staging capacitance (Cs) to the precharged primary capacitance (130) and then isolates the precharged staging capacitance (Cs) from the primary capacitance (130), and the second switching device (S2, S3) isolates the staging capacitance (Cs) from the bitline while the staging capacitance Cs is coupled to the primary capacitance (130), and then couples the precharged staging capacitance (Cs) to the bitline to provide a reference voltage to the bitline during the memory access operation.