SEMICONDUCTOR PROCESSORS

Brand Owner (click to sort) Address Description
ALTIS OPTIMAL ALTIS SEMICONDUCTOR 91 rue du Faubourg Saint Honoré F-75008 PARIS France Semiconductor processors; semiconductor processor chips; semiconductor memory devices; semi-conductor devices;Development and design of new technologies for others in the field of microchips; design of integrated circuits in the field of integrated semi-conductor components for the rapid development of new semiconductor products, integrated circuits as series components, and system design services; services provided by technical consultants, namely, technical consulting services in the fields of central processing units and semi-conductors, namely, technical consulting services in the fields of development, production, packaging design, and inspection of the compatibility of semiconductor products being integrated circuits with specific application or standard products with specific application and integrated circuits as series components connected to one another; design and development of microprocessors, namely, development work as microprocessor design services; design and development of semi-conductors, namely, development work as semiconductor design services;
XTENDNET AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED 1 Yishun Avenue 7 Singapore 768923 Singapore Semiconductor processors; semiconductor processor chips; integrated circuit chips; semiconductors; and integrated circuits; all the foregoing excluding RF radio modems;EXTEND NET; EXTEND NETWORKING;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. An apparatus and method for interfacing a processor to one or more co-processors provides a dual ported memory to be used as a message passing buffer between the processor and the co-processors. Both the processor and co-processors can connect asynchronously to the dual ported memory. Control logic monitors activity by the processor to alert the co-processors of communications by the processor written to the memory and otherwise allows the processor and co-processors to think they are interfacing directly with one another.