INTEGRATED CIRCUIT MEMORY

Brand Owner (click to sort) Address Description
HD-DRAM Mosaid Technologies Incorporated Suite 704 515 Leggett Drive Ottawa K2K3G4 Canada integrated circuit memory;HD DRAM;
HDRAM Mosaid Technologies Incorporated Suite 704 515 Leggett Drive Ottawa K2K3G4 Canada integrated circuit memory;
ML-DRAM Mosaid Technologies Incorporated Suite 704 515 Leggett Drive Ottawa K2K3G4 Canada integrated circuit memory;
PRONIX LEBRO INDUSTRIAL CO., LTD. 11F-1, No.185, Sung Chiang Rd. Taipei Taiwan Integrated circuit memory, integrated circuit wafers and chips, integrated circuits devices, semiconductor components, namely, semiconductor chips, integrated circuits, accelerator cards, computer operating systems, personal computer system, namely, desktop PC and laptop PC, interface cards, dynamic random access memory components and modules, mass storage medias for audio and video applications, namely, floppy discs, hard discs, CD drives and flash memory USB driver, security digital card(SD card), solid state driver for computer, digital photo frames, memory cards, digital audio and video players, security systems used for homes, office and automobiles, comprising wireless controllers, controlled devices, and software for security, safety, and other home and office monitoring control applications, combination electric lock for computers, construction equipment for internet; fingerprint identification equipment, namely, computerized time clock with fingerprint recognition, solid state drive, computer mouse, Universal Serial Bus drivers, personal digital assistant;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. A memory module includes an integrated circuit buffer device that receives control information via a connector interface. A first plurality of signal lines carries a first address from the integrated circuit buffer device to a first memory device. A second plurality of signal lines carries a first control signal from the integrated circuit buffer device to the first memory device. The first control signal specifies a read operation by the first memory device such that the first memory device provides first data, accessed from a memory location in the first memory device based on the first address, to the integrated circuit buffer device. A first signal line carries a first signal from the integrated circuit buffer device to the first memory device. The first signal synchronizes communication of the first control signal from the integrated circuit buffer device to the first memory device. A third plurality of signal lines carries a second address from the integrated circuit device to the second memory device. A fourth plurality of signal lines carries a second control signal from the integrated circuit buffer device to the second memory device. The second control signal specifies a read operation. The second control signal corresponds to the control information. A second signal line carries a second signal from the integrated circuit buffer device to the second memory device. The second signal synchronizes communication of the second control signal from the integrated circuit buffer device to the second memory device. A transmitter circuit is disposed on the integrated circuit buffer device.