DIGITAL LABS

Brand Owner (click to sort) Address Description
COMPASS DIGITAL LABS COMPASS GROUP USA, INC. 2400 Yorkmont Road Charlotte NC 28217 DIGITAL LABS;Development of digital technology solutions, namely, mobile applications, analytics software platforms, machine learning algorithms and computer hardware, all for use in the fields of food, hospitality, building operations and maintenance;
QUALIFY DIGITAL LABS QUALIFY DIGITAL LABS 1 MOUNTAIN GATE COTO DE CAZA CA 92679 DIGITAL LABS;Developing and hosting a server on a global computer network for the purpose of facilitating e-commerce via such a server; Providing technology consulting in the field of social media; Technology advisory services related to website creation and architecture; Website design and development for others;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. An embodiment of this invention pertains to a versatile and flexible logic element and logic array block ("LAB"). Each logic element includes a programmable combinational logic function block such as a lookup table ("LUT") and a flip-flop. Within the logic element, multiplexers are provided to allow the flip-flop and the LUT to be programmably connected such that either the output of the LUT may be connected to the input of the flip-flop or the output of the flip-flop may be connected to the input of the LUT. An additional multiplexer allows the output of the flip-flop in one logic element to be connected to the input of a flip-flop in a different logic element within the same LAB. Output multiplexers selects between the output of the LUT and the output of the flip-flop to generate signals that drive routing lines within the LAB and to routing lines external to the LAB. These output multiplexers are constructed such that the combinational output (output from the LUT) is faster than the output from the flip-flop. A collection of routing lines and multiplexers within the LAB are used to provide inputs to the LUTs. Each of the input multiplexers for each logic element is connected to a subset of the routing lines within the LAB using a specific pattern of connectivity of multiplexers to associated wires that maximizes the efficiency of use of the routing wires. Control signals for the set of logic elements within the LAB are generated using a secondary signal generation unit that minimizes contention for shared signals. One of the control signals is an "add-or-subtract control signal" that allows all of the LEs in a LAB to perform either addition or subtraction under the control of a logic signal. In a PLD supporting redundancy, the carry chain for the LABs is arranged in the same direction that redundancy shifts to remap defective LABs and a multiplexer on the carry input of a LAB is used to select the appropriate carry output from another LAB depending on whether redundancy is engaged.