ADMINISTERING UNDERWRITING DEFERRED ANNUITIES

Brand	Owner (click to sort)	Address	Description
ACCUMULATOR	EQUITABLE FINANCIAL LIFE INSURANCE COMPANY	1290 AVENUE OF THE AMERICAS NEW YORK NY 10104	ADMINISTERING AND UNDERWRITING DEFERRED ANNUITIES;
BEYOND RETIREMENT	EQUITABLE LIFE ASSURANCE SOCIETY OF THEUNITED STATES, THE	1290 Avenue of the Americas New York NY 10104	administering and underwriting deferred annuities;RETIREMENT;
EQUI-VEST TSA ADVANTAGE	AXA EQUITABLE LIFE INSURANCE COMPANY	1290 Avenue of the Americas New York NY 10104	ADMINISTERING AND UNDERWRITING DEFERRED ANNUITIES;EQUI VEST TSA ADVANTAGE;TSA;
MY ACCUMULATOR PLUS	AXA EQUITABLE LIFE INSURANCE COMPANY	1290 Avenue of the Americas New York NY 10104	Administering and underwriting deferred annuities;as to ACCUMULATOR;
THE INCOME MANAGER	EQUITABLE LIFE ASSURANCE SOCIETY OF THEUNITED STATES, THE	1290 Avenue of the Americas New York NY 10104	administering and underwriting deferred annuities;MANAGER;
	Where the owner name is not linked, that owner no longer owns the brand

Technical Examples

One embodiment of the present invention provides a system that avoids write-after-write (WAW) hazards while speculatively executing instructions. The system starts in a normal execution mode, wherein the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint, defers the instruction, and executes subsequent instructions in an execute-ahead mode. During this execute-ahead mode, instructions that cannot be executed because of unresolved data dependencies are deferred, and other non-deferred instructions are executed in program order. If an unresolved data dependency is resolved during the execute-ahead mode, the system moves into a deferred mode wherein the system executes deferred instructions. While executing a deferred instruction, if dependency information for an associated destination register indicates that a WAW hazard potentially exists with a following non-deferred instruction, the system executes the deferred instruction to produce a result, and forwards the result to be used by subsequent instructions in a pipeline and/or deferred queue for the processor. The system does so without committing the result to the architectural state of the destination register. In this way, the system makes the result available to the subsequent instructions without overwriting a result produced by the following non-deferred instruction, thereby avoiding a WAW hazard.